As one of electronic part packages (electronic devices) including an electronic part, such as a semiconductor device, or the like, a wafer level package (WLP) (also referred to as a wafer level-chip size package (WL-CSP), or a wafer-chip size package (W-CSP)) is known. The WLP makes it possible for terminals of an electronic part to be relocated (fan-in) in its part area. Also, with an increase in the number of terminals of an electronic part, a WLP that is capable of relocating (fan-out) terminals outside its part area is being developed in view of the difficulty of reallocating terminals within its part area.
Regarding manufacture of such an electronic part package, a technique using a method of disposing an electronic part on a supporting body, sealing the electronic part with a resin layer to produce a pseudo wafer, and separating the pseudo wafer from the supporting body is known. A wiring layer is provided on the surface of the pseudo wafer separated from the supporting body, and then the pseudo wafer is divided into individual electronic part packages.
For example, an electronic part package is provided with bumps on its wiring layer, and is mounted on a substrate, such as a motherboard, or the like using the bumps.
A related-art technique is disclosed in Japanese Laid-open Patent Publication No. 2011-258847.